1. Technical Field
The present disclosure relates to a communication device, method and program in a semiconductor system having a bus.
2. Description of the Related Art
FIG. 1(a) shows an example centralized bus control. With a conventional integrated circuit performing a centralized bus control, the connection between a plurality of bus masters and a memory device is primarily made by a single bus, and an arbiter arbitrates between bus masters for access to the memory device. However, an integrated circuit now has an enhanced functionality and multiple cores, thereby increasing the circuit scale, with traffic flows flowing through the bus while varying in a complicated manner, thus making it more difficult to design an integrated circuit based on a centralized bus control.
On the other hand, semiconductor integrated circuits have been developed recently which have distributed buses incorporating connection techniques of parallel computing and network control techniques such as the ATM (Asynchronous Transfer Mode) network. FIG. 1(b) shows an example distributed bus control. A semiconductor integrated circuit with distributed buses has a configuration where a plurality of routers are connected together by a plurality of buses. Recently, efforts have been made for a network on chip (NoC) where traffic flows in an integrated circuit of an increased scale are transmitted while being distributed among a plurality of buses, using distributed buses as shown in FIG. 1(b).
The traffic flows on a bus of a semiconductor device have been increasing each year. Therefore, in order to maintain the bus transmission performance, it is necessary to increase the bus operating frequency or the bus width in accordance with the increase in the traffic flows even with the NoC described above.
Moreover, in connection with this, there are also influences of the decrease in the voltage of semiconductor devices, and influences of the increase in the line length, which are deriving from the increase in the scale of the system.
FIGS. 2(a) to 2(c) show an example of how the scale of a video chip has increased. In FIG. 2, (a) shows the size of a high-definition (HD) video chip, (b) shows the size of a so-called “4K2K” video chip, and (c) shows the size of a so-called “8K4K” video chip. The size of a chip tends to increase as the amount of data to be handled increases.
Design of Low Power On-chip Router with Error-detection Re-transfer Scheme, Information Processing Society of Japan Study Report (January 2011)(hereinafter referred to as “Non-Patent Document No. 1”) points out influences of the decrease in the voltage of semiconductor devices and the increase in the line length of the system, and also points out transmission errors occurring on the bus deriving from those influences (Non-Patent Document No. 1).